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1 for more information www.linear.com/lt3090 output noise: 10hz to 100khz typical a pplica t ion fea t ures descrip t ion C36v , 600ma negative linear regulator with programmable curr ent limit the lt ? 3090 is a 600 ma, low dropout negative linear regulator that is easily parallelable to increase output current or spread heat on surface mounted boards . designed with a precision current reference followed by a high performance rail-to-rail voltage buffer, this regulator finds use in applications requiring precision output, high current with no heat sink, output adjustability to zero and low dropout voltage. the device can also be configured as a 3-terminal floating regulator. the lt3090 features fast transient response, high psrr and output noise as low as 18v rms . the lt3090 generates a wide output voltage range (0 v to C32 v) while maintain- ing unity gain operation. this yields virtually constant bandwidth, load regulation, psrr and noise, regardless of the programmed output voltage. the lt3090 supplies 600 ma at a typical dropout voltage of 300 mv. operating quiescent current is nominally 1ma and drops to << 1 a in shutdown. a single resistor ad- justs the lt3090s precision programmable current limit. the lt3090s positive or negative current monitor either sources a current (0.5 ma/a) or sinks a current (1ma/a) proportional to output current. built-in protection includes reverse output protection, internal current limit with fold- back and thermal shutdown with hysteresis. a pplica t ions l, lt , lt c , lt m , linear technology and the linear logo are registered trademarks and thinsot is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. patent pending. n output current: 600ma n single resistor sets output voltage n 50a set pin current: 1% initial accuracy n programmable current limit n positive or negative output current monitor n parallelable for higher current and heat spreading n low dropout voltage: 300mv n low output noise: 18v rms (10hz to 100khz) n configurable as 3-t erminal floating regulator n wide input voltage range: C1.5v to C36v n rail-to-rail output voltage range: 0v to C32v n positive/negative shutdown logic or uvlo n programmable cable drop compensation n load regulation: 1.2mv (1ma to 600ma) n stable with 4.7f minimum output capacitor n stable with ceramic or tantalum capacitors n thermally enhanced 12-lead msop and 10-lead 0.75mm 3mm 3mm dfn packages n post regulator for switching supplies n low noise instrumentation and rf supplies n rugged industrial supplies n precision power supplies v in : ?3.5v v out : ?2v c out : 4.7f, c set : 0.1f i l : 600ma v out 100v/div 1ms/div 3090 ta01b lt3090 v out ?2.5v max i out 600ma set gnd ilim shdn 3090 ta01a ? + 50a imonp out imonn 0.1f 4.7f 49.9k 3.32k to adc (imon) in v in ?3v to ?10v 10k 3.3v 4.7f 0.1f lt 3090 3090fa
2 for more information www.linear.com/lt3090 p in c on f igura t ion a bsolu t e maxi m u m r a t ings in pin voltage ( note 3) wi th respect to gnd pin ........................... 0. 3 v, C40v ilim pin voltage wi th respect to in pin ( note 3) ................ C 0.3 v , 0.7 v imonp pin voltage wi th respect to in pin ( note 3) ................. C 0.3 v, 40v wi th respect to gnd pin ............................ C 40 v, 20v wi th respect to imonn pin ........................ C 40 v, 20v imonn pin voltage wi th respect to in pin ( note 3) ................. C 0.3 v, 40v wi th respect to gnd pin ............................ C 40 v, 20v shdn pin voltage wi th respect to in pin ( note 3) ................. C 0.3 v, 55v wi th respect to gnd pin ............................ C 40 v, 20v (note 1) top view 11 in dd package 10-lead (3mm 3mm) plastic dfn 10 9 6 7 8 4 5 3 2 1 out out gnd set shdn in in ilim imonp imonn t jmax = 150c, ja = 34c/w, jc = 5.5c/w exposed pad ( pin 11) is in, must be soldered to pcb 1 2 3 4 5 6 in in in ilim imonp imonn 12 11 10 9 8 7 out out out gnd set shdn top view 13 in mse package 12-lead plastic msop t jmax = 150c, ja = 33c/w, jc = 8c/w exposed pad ( pin 13) is in, must be soldered to pcb o r d er i n f or m a t ion lead free finish tape and reel part marking* package description temperature range lt3090edd#pbf lt3090edd#trpbf lghj 10-lead (3mm x 3mm) plastic dfn C40c to 125c lt3090idd#pbf lt3090idd#trpbf lghj 10-lead (3mm x 3mm) plastic dfn C40c to 125c lt3090hdd#pbf lt3090hdd#trpbf lghj 10-lead (3mm x 3mm) plastic dfn C40c to 150c lt3090mpdd#pbf lt3090mpdd#trpbf lghj 10-lead (3mm x 3mm) plastic dfn C55c to 150c lt3090emse#pbf lt3090emse#trpbf 3090 12-lead plastic msop C40c to 125c lt3090imse#pbf lt3090imse#trpbf 3090 12-lead plastic msop C40c to 125c lt3090hmse#pbf lt3090hmse#trpbf 3090 12-lead plastic msop C40c to 150c lt3090mpmse#pbf lt3090mpmse#trpbf 3090 12-lead plastic msop C55c to 150c consult lt c marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ set pin voltage wi th respect to in pin ( note 3) ................. C 0.3 v, 36v wi th respect to gnd pin .................................... 3 6 v set pin current ( note 9) ........................................ 5 ma out pin voltage wi th respect to in pin ( note 3) ................. C 0.3 v, 36v wi th respect to gnd pin .................................... 3 6 v output short - circuit duration .......................... in definite operating junction temperature range ( note 2) e -, i- grade ........................................ C 40 c to 125 c mp - gr ade ......................................... C 55 c to 150 c h- gr ade ............................................ C 40 c to 150 c storage temperature range .................. C 65 c to 150 c lead temperature ( soldering , 10 sec ) mse package ................................................... 30 0 c lt 3090 3090fa
3 for more information www.linear.com/lt3090 e lec t rical c harac t eris t ics parameter conditions min typ max units minimum in voltage (note 11) i load = 100ma i load = 600ma l C1.9 C1.5 C1.5 v v set pin current (i set ) v in = C1.9v, i load = 1ma, C36v < v in < C1.9v, 1ma < i load < 600ma (note 5) l 49.5 49 50 50 50.5 51 a a output offset v oltage v os (v out C v set ) v in = C1.9v, i load = 1ma, C36v < v in < C1.9v, 1ma < i load < 600ma (note 5) l C1 C2 1 2 mv mv line regulation: i set /v in line regulation: v os /v in v in = C1.9v to C36v, i load = 1ma v in = C1.9v to C36v, i load = 1ma 1.5 2.5 na/v v/v load regulation: i set load regulation: v os i load = 1ma to 600ma i load = 1ma to 600ma, v in = C1.9v (note 6) l 0.5 1.2 2.5 na mv output regulation with set pin v oltage change: i set /v set v os /v set v set = 0v to C32v, v in = C36v, i load = 1ma v set = 0v to C32v, v in = C36v, i load = 1ma l l 0.2 2.5 1 30 na/v v/v dropout v oltage v in = v out(nominal) (note 7) i load = 1ma i load = 1ma i load = 100ma i load = 100ma i load = 600ma i load = 600ma l l l 185 195 300 230 270 240 300 360 450 mv mv mv mv mv mv gnd pin current v in = v out(nominal) (note 8) i load = 10a i load = 1ma i load = 100ma i load = 600ma l l l l 1 1.05 2.6 11.5 1.4 1.4 5 22.5 ma ma ma ma error amplifier rms output noise (note 12) i load = 600ma, bw = 10hz to 100khz, c out = 4.7f, c set = 0.1f 18 v rms reference current rms output noise (note 12) bw = 10hz to 100khz 10 na rms ripple rejection v in C v out = C1.5v (avg) v ripple = 500mv p-p , f ripple = 120hz, i load = 100ma, c out = 4.7f , c set = 0.47f v ripple = 50mv p-p , f ripple = 10khz, i load = 600ma, c out = 4.7f , c set = 0.47f v ripple = 50mv p-p , f ripple = 1mhz, i load = 600ma, c out = 4.7f , c set = 0.47f 70 85 50 20 db db db shdn pin t urn-on threshold positive shdn rising negative shdn rising ( in magnitude) l l 1.14 C1.36 1.23 C1.27 1.32 C1.18 v v shdn pin hysteresis positive shdn hysteresis negative shdn hysteresis 180 190 mv mv shdn pin current (note 10) v shdn = 0v v shdn = 15v v shdn = C15v C7 21 C4.5 1 30 a a a quiescent current in shutdown v in = C6v, v shdn = 0v v in = C6v, v shdn = 0v l 0.1 1 10 a a internal current limit (note 13) v in = C1.9v, v out = 0v v in = C13v, v out = 0v v in = C36v, v out = 0v v in = C1.9v, v out < 10mv l l l 650 20 630 750 350 35 730 850 60 830 ma ma ma ma programmable current limit programming scale factor: C36v < v in < C1.9v, i out > 50ma (note 14) max i out : v in = C1.9v, r ilim = 20k max i out : v in = C1.9v, r ilim = 100k l l 460 85 10 500 100 540 115 a ? k ma ma the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. lt 3090 3090fa
4 for more information www.linear.com/lt3090 note 1. stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2. the lt3090 is tested and specified under pulsed load conditions such that t j ? t a . the lt3090e is guaranteed to meet performance specifications from 0c to 125c junction temperature. specifications over the C40c to 125c operating temperature range are assured by design, characterization, and correlation with statistical process controls. the lt3090i is guaranteed over the full C40c to 125c operating junction temperature range. the lt3090mp is 100% tested and guaranteed over the full C55c to 150c operating junction temperature range. the lt3090h is 100% tested at the 150c operating junction temperature. high junction temperatures degrade operating lifetimes. operating lifetime is derated at junction temperatures greater than 125c. note 3. parasitic diodes exist internally between the out, set, ilim, shdn, imonp, imonn, and gnd pins and the in pin. do not drive out, set, ilim, shdn, imonp, imonn, and gnd pins more than 0.3v below the in pin during fault conditions. these pins must remain at a voltage more positive than in during normal operation. note 4. the lt3090 may go out of regulation if the minimum output current requirement is not satisfied. note 5. maximum junction temperature limits operating conditions. the regulated output voltage specification does not apply for all possible combinations of input voltage and output current, primarily due to the internal current limit foldback which decreases current limit at v out C v in 7v. if operating at maximum output current, limit the input voltage range. if operating at maximum input voltage, limit the output current range. note 6. load regulation is kelvin sensed at the package. note 7. dropout voltage is the minimum output-to-input voltage differential needed to maintain regulation at a specified output current. in dropout, the output voltage is: v in + v dropout . note 8. gnd pin current is tested with v in = v out(nominal) and a current source load. therefore, the device is tested while operating in dropout. this is the worst-case gnd pin current. gnd pin current decreases at higher input voltages. note 9. the set pin is clamped to out with diodes through 12k resistors. these resistors and diodes only carry current under transient overloads or fault conditions. note 10. positive shdn pin current flows into the shdn pin. note 11. the shdn threshold must be met to ensure device operation. note 12. output noise decreases by adding a capacitor across the voltage setting resistor. adding this capacitor bypasses the voltage setting resistors thermal noise as well as the reference currents noise. output noise then equals the error amplifier noise (see applications information section). note 13. the internal back-up current limit circuitry incorporates foldback protection that decreases current limit for v out C v in 7v. some level of output current is provided at all v out C v in differential voltages. please consult the typical performance characteristic graph for current limit vs v out C v in . note 14. the current limit programming scale factor is specified while the internal backup current limit is not active. please note that the internal current limit has foldback protection for v out -to-v in differentials greater than 7v. note 15. for positive current monitoring, bias imonn to 2v above imonp. parameter conditions min typ max units positive current monitor (note 15) positive current monitoring (imonp) scale factor i out = 600ma, v in = C2.5v, v imonn = 2v, v imonp = 0v i out = 100ma, v in = C2.5v, v imonn = 2v, v imonp = 0v l l 280 42.5 0.5 300 50 320 57.5 ma /a a a negative current monitor negative current monitoring (imonn) scale factor i out = 600ma, v in = C2.5v, v imonn = 0v, v imonp = C2.5v i out = 100ma, v in = C2.5v, v imonn = 0v, v imonp = C2.5v l l 560 85 1 600 100 640 115 ma /a a a minimum required load current (note 4) C36v < v in < C1.9v l 10 a thermal regulation iset 10ms pulse 0.04 %/w e lec t rical c harac t eris t ics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. lt 3090 3090fa
5 for more information www.linear.com/lt3090 typical p er f or m ance c harac t eris t ics offset voltage set pin current offset voltage (v out C v set ) set pin current offset voltage (v out C v set ) load regulation set pin current set pin current offset voltage (v out C v set ) t j = 25c, unless otherwise noted. temperature (c) ?75 set pin current (a) 50.5 50.4 50.2 50.0 50.3 50.1 49.9 49.8 49.7 49.6 49.5 25 ?25 75 100 125 3090 g01 150 0 ?50 50 i l = 1ma v out = ?1.25v v in = ?1.9v temperature (c) ?75 offset voltage (mv) 2.0 1.5 0.5 0 1.0 ?0.5 ?1.0 ?1.5 ?2.0 25 ?25 75 100 125 3090 g03 150 0 ?50 50 i l = 1ma v out = ?1.25v v in = ?1.9v input voltage (v) 0 set pin current (a) 50.5 50.4 50.2 50.0 50.3 50.1 49.9 49.8 49.7 49.6 49.5 ?20 ?10 ?30 ?35 3090 g05 ?40 ?15 ?5 ?25 i l = 1ma v out = ?1.25v ?55c 25c 125c 150c input voltage (v) 0 offset voltage (mv) 2.0 1.5 0 1.0 0.5 ?0.5 ?1.0 ?1.5 ?2.0 ?20 ?10 ?30 ?35 3090 g06 ?40 ?15 ?5 ?25 i l = 1ma v out = ?1.25v ?55c 25c 125c 150c output voltage (v) 0 set pin current (a) 50.5 50.4 50.2 50.0 50.3 50.1 49.9 49.8 49.7 49.6 49.5 ?8 ?24 ?28 3090 g07 ?32 ?16?12 ?4 ?20 i l = 1ma v in = ?36v ?55c 25c 125c 150c output voltage (v) 0 offset voltage (mv) 2.0 1.5 0 1.0 0.5 ?0.5 ?1.0 ?1.5 ?2.0 ?8 ?24 ?28 3090 g08 ?32 ?16?12 ?4 ?20 i l = 1ma v in = ?36v ?55c 25c 125c 150c temperature (c) ?75 set pin current load regulation (na) offset voltage load regulation (mv) 30 20 10 0 ?10 ?20 2.5 2.0 1.5 1.0 0.5 0 ?25 75 125100 3090 g09 150 250 ?50 50 ?i l = 1ma to 600ma v in = ?1.9v v out = ?1.25v 49 49.5 50.5 3090 g02 51 50 distribution (a) n = 3122 ?2 ?1 1 3090 g04 2 0 v os distribution (mv) n = 3122 lt 3090 3090fa
6 for more information www.linear.com/lt3090 typical p er f or m ance c harac t eris t ics dropout voltage gnd pin current gnd pin current entering dropout minimum input voltage shdn turn-on threshold shdn pin hysteresis quiescent current typical dropout voltage guaranteed dropout voltage output current (ma) 0 gnd pin current (ma) 16 12 14 8 6 4 2 10 0 300 400 500 3090 g14 600 100 200 v in = ?3.5v v out = ?3v ?55c 25c 125c 150c input voltage (v) ?2.5 ?2.6 ?2.7 ?2.8 ?2.9 ?3 ?3.1 ?3.2 ?3.3 ?3.4 ?3.5 gnd pin current (ma) 12 14 8 6 4 2 10 0 3090 g15 v out(nominal) = ?3v i l = 300ma i l = 100ma i l = 1ma i l = 600ma temperature (c) ?75 ?50 ?25 0 25 50 75 100 125 150 minimum input voltage (v) ?1.8 ?2.0 ?1.4 ?1.2 ?1.0 ?0.8 ?0.6 ?0.4 ?0.2 ?1.6 0 3090 g16 r set = 25k i l = 1ma temperature (c) ?75 ?50 ?25 0 25 50 75 100 125 150 shdn pin hysteresis (v) 0.30 0.15 0.20 0.10 0.05 0.25 0 3090 g18 v in = ?1.9v positive shdn hysteresis negative shdn hysteresis t j = 25c, unless otherwise noted. temperature (c) ?75 quiescent current (ma) 1.2 0.8 0.6 1.0 0.4 0.2 0 25 ?25 75 100 125 3090 g10 150 0 ?50 50 r l = 125k (10a) v out = ?1.25v v in = ?1.9v v shdn = v in v shdn = 0v temperature (c) ?75 dropout voltage (mv) 450 350 300 400 200 150 100 50 250 0 25 50 75 100 125 3090 g13 150 ?25?50 0 i l = 600ma i l = 300ma i l = 1ma i l = 100ma output current (ma) 0 dropout voltage (mv) 450 350 300 400 200 150 100 50 250 0 400 500 3090 g11 600 200100 300 ?55c 25c 125c 150c output current (ma) 0 dropout voltage (mv) 500 450 350 300 400 200 150 100 50 250 0 400 500 3090 g12 600 200100 300 t j 150c t j 25c temperature (c) ?75 positive shdn turn-on thershold (v) negative shdn turn-on threshold (v) 1.300 1.275 1.250 1.225 1.200 1.175 1.150 ?1.300 ?1.275 ?1.250 ?1.225 ?1.200 ?1.175 ?1.150 ?25 75 125100 3090 g17 150 250 ?50 50 v in = ?1.9v lt 3090 3090fa
7 for more information www.linear.com/lt3090 imonn pin current at 500ma imonn pin current at 100ma imonp pin current imonp pin current at 500ma imonp pin current at 100ma programmable current limit shdn pin current shdn pin current imonn pin current typical p er f or m ance c harac t eris t ics shdn pin voltage (v) ?36 ?28 ?20 ?12 ?4 4 12 20 shdn pin current (a) 30 15 20 10 5 0 ?5 ?10 25 ?15 3090 g19 v in = ?36v ?55c 25c 125c 150c temperature (c) ?75 ?50 ?25 0 25 50 75 100 125 150 imonn current (a) 540 520 510 500 490 470 480 530 460 3090 g22 v out = ?1.2v v imonn = ?0.5v v imonp = v in i load = 500ma v in = ?3v v in = ?7v temperature (c) ?75 ?50 ?25 0 25 50 75 100 125 150 imonn current (a) 120 110 105 100 95 85 90 115 80 3090 g23 v out = ?1.2v v imonn = ?0.5v v imonp = v in i load = 100ma v in = ?3v v in = ?7v t j = 25c, unless otherwise noted. temperature (c) ?75 ?50 ?25 0 25 50 75 100 125 150 imonp current (a) 270 260 250 240 245 235 265 255 230 3090 g25 v in = ?3v v in = ?7v v out = ?1.2v v imonn = 3v v imonp = 0.5 i load = 500ma temperature (c) ?75 ?50 ?25 0 25 50 75 100 125 150 imonp current (a) 60 56 52 48 50 46 44 42 58 54 40 3090 g26 v in = ?3v v in = ?7v v out = ?1.2v v imonn = 3v v imonp = 0.5 i load = 100ma temperature (c) ?75 ?50 ?25 0 25 50 75 100 125 150 current limit (ma) 600 500 400 300 200 100 0 3090 g27 rilim = 20k rilim = 100k v in = ?2v v out = 0v temperature (c) ?75 ?50 ?25 0 25 50 75 100 125 150 shdn pin current (a) 25 15 10 5 0 20 ?5 3090 g20 v shdn = 15v v shdn = ?15v v in = ?15v i load (ma) 0 100 200 300 400 500 600 700 imonp current (a) 350 250 200 100 150 50 300 0 3090 g24 v out = ?1.2v v in = ?3v v imonn = 3v v imonp = 0.5v output current (ma) 0 100 200 300 400 500 600 imonn current (a) 700 500 400 300 200 100 600 0 3090 g21 v in = ?3v v out = ?1.2v v imonn = ?0.5v v imonp = v in lt 3090 3090fa
8 for more information www.linear.com/lt3090 t j = 25c, unless otherwise noted. typical p er f or m ance c harac t eris t ics internal current limit input ripple rejection input ripple rejection input ripple rejection ripple rejection (120hz) programmable brick-wall current limit internal current limit internal current limit noise spectral density temperature (c) ?75 ?50 ?25 0 25 50 75 100 125 150 current limit (ma) 60 50 40 20 30 10 0 3090 g30 v in = ?36v v out = 0v input-to-output differential (v) 0 current limit (ma) 800 600 400 300 700 500 200 100 0 ?12 ?24 ?30 3090 g31 ?36 ?18 ?6 ?55c 25c 125c 150c v out = 0v output current (ma) 0 100 200 300 400 500 600 output voltage (v) ?1.50 ?1.25 ?1.00 ?0.75 ?0.50 ?0.25 0 3090 g28 rilim = 100k rilim = 20k rilim = 40k r set = 25k v in = ?3v temperature (c) ?75 ?50 ?25 0 25 50 75 100 125 150 current limit (ma) 800 700 600 500 400 300 200 100 0 3090 g29 v in = ?1.9v v out = 0v frequency (hz) ripple rejection (db) 3090 g32 80 70 60 50 30 40 20 10 0 10 100 1k 1m 10m 100k10k v out = ?2.5v i load = 600ma c set = 0.1f input ripple = 50mv rms ?3v in ?3.5v in ?4.5v in frequency (hz) ripple rejection (db) 3090 g33 80 70 60 50 30 40 20 10 0 10 100 1k 1m 10m 100k10k v out = ?2.5v v in = ?3.5v c set = 0.1f input ripple = 50mv rms i l = 600ma i l = 300ma i l = 100ma frequency (hz) ripple rejection (db) 3090 g34 100 90 80 70 50 60 40 30 20 10 0 10 100 1k 1m 10m 100k10k v out = ?2.5v i load = 600ma c set = 0.1f input ripple = 50mv rms c out = 4.7f, c set = 0.1f c out = 22f, c set = 0.1f c out = 4.7f, c set = 0.47f temperature (c) ?75 ripple rejection (db) 100 90 85 95 80 75 70 25 ?25 75 100 125 3090 g35 150 0 ?50 50 v in = ?4v v out = ?2.5v i load = 600ma c set = 0.47f frequency (hz) error amplifier noise spectral density (nv/ hz) reference current noise spectral density (pa/ hz) 3090 g36 1k 100 10 100 10 1 10 100 1k 100k 10k lt 3090 3090fa
9 for more information www.linear.com/lt3090 t j = 25c, unless otherwise noted. typical p er f or m ance c harac t eris t ics load transient response, C3v out output noise: 10hz to 100khz output noise: 10hz to 100khz fast input supply start-up line transient response slow input supply ramp-up and ramp-down fast input supply start-up v in : ?5v to ?4v c out : 4.7f, c set : 0.1f v out : ?3v i l : 600ma, shdn = in 5s/div ?v out 50mv/div v in 500mv/div 3090 g40 v in : ?3.5v c out : 4.7f, c set : 20pf v out : ?2v i l : 600ma 1ms/div v out 1mv/div 3090 g37 v in : ?3.5v c out : 4.7f, c set : 0.1f v out : ?2v i l : 600ma 1ms/div v out 100v/div 3090 g38 v in : 0v to ?5v c out : 4.7f, c set : 100pf v out : 0v to ?3v i l : 600ma, shdn = in 20s/div v out 1v/div v in 2v/div 0v 0v 3090 g42 i load : 20ma to 600ma c out : 4.7f, c set : 0.1f v out : ?3v v in = ?4v, shdn = in 20s/div i load 300ma/div ?v out 100mv/div 3090 g39 v in : ?5v to 0v c out : 4.7f, c set : 0.1f v out : ?3v to 0v i l : 600ma, shdn = in 50ms/div v in 1v/div v out 1v/div 0v 3090 g41 v in : 0v to ?5v c out : 4.7f, c set : 0.1f v out : 0v to ?3v i l : 600ma, shdn = in 5ms/div 0v v out 1v/div v in 2v/div 0v 3090 g43 lt 3090 3090fa
10 for more information www.linear.com/lt3090 p in func t ions in (pins 1, 2, exposed pad 11/1, 2, 3, exposed pad 13): input. these pins supply power to the regulator. the exposed backside pad of the dfn and msop packages is an electrical connection to in and the devices substrate. for proper electrical and thermal performance, tie all in pins together and tie in to the exposed backside of the package on the pcb. see the applications information section for thermal considerations and calculating junc - tion temperature . the lt3090 requires a bypass capaci- tor at in. in general, a batterys output impedance rises with frequency, so include a bypass capacitor in battery powered applications. an input bypass capacitor in the range of 2.2 f to 4.7 f generally suffices, but applica - tions with large load transients or longer input lines may require higher input capacitance to prevent input supply droop or input ringing. ilim (pin 3/4): current limit programming pin. con- necting an external resistor between the ilim and in pins programs the current limit set point. for best accuracy, kelvin connect this resistor to the in pins. the program - ming scale factor is nominally 10a ? k. current limit is accurate to 8% over temperature. if unused, tie ilim to in and the internal current limit protects the part. a parasitic substrate diode exists between the lt3090s ilim and in pins. therefore, do not drive ilim more than 0.3 v below in during normal operation or during a fault condition. imonp (pin 4/5): positive current monitoring pin. for positive current monitoring, connect a resistor between imonp and gnd. imonp sources current equal to 1/2000 of output current. for negative current monitoring, tie this pin to in. for proper operation, in and imonp must be at least 2 v below imonn. if unused, tie imonp to in. a parasitic substrate diode exists between the lt3090s imonp and in pins. therefore, do not drive imonp more than 0.3 v below in during normal operation or during a fault condition. imonn (pin 5/6): negative current monitoring pin. for negative current monitoring, connect a resistor between imonn and gnd. imonn sinks current equal to 1/1000 of output current. for positive current monitoring, bias imonn to a positive supply voltage ( at least 2 v above imonp). if unused, tie imonn to the gnd pin. a parasitic substrate diode exists between the lt3090s imonn and in pins. therefore, do not drive imonn more than 0.3 v below in during normal operation or during a fault condition. shdn ( pin 6/7): shutdown. use the shdn pin to put the lt3090 into a micropower shutdown state and to turn off the output voltage. the shdn function is bidirectional, al - lowing either positive or negative logic to turn the regulator on/off. the shdn pin threshold voltages are referenced to gnd. the output of the lt3090 is off if the shdn pin is pulled within 0.45 v of gnd. driving the shdn pin more than 1.4 v turns the lt3090 on. drive the shdn pin with either a logic gate or with open collector/drain logic using a pull-up resistor. the resistor supplies the pull-up current of the open collector/drain gate. the maximum shdn pin current is 7 a out of the pin ( for negative logic) or 30a into the pin ( for positive logic). if the shdn function is unused, connect the shdn pin to v in or a positive bias voltage to turn the device on. do not float the shdn pin. as detailed in the applications information section, the shdn pin can also be used to set a programmable undervoltage lockout ( uvlo) threshold. a parasitic diode exists between the lt3090s shdn and in pins. therefore , do not drive shdn more than 0.3 v below in during normal operation or during a fault condition. set (pin 7/8): set. this pin is the inverting input to the error amplifier and the regulation setpoint for the device. a precision fixed current of 50 a flows into this pin. con - necting a resistor from set to gnd programs the lt3090 s output voltage. output voltage range is from zero to the C36 v absolute maximum rating. adding a bypass capacitor from set to gnd improves transient response, psrr, noise performance and soft starts the output. kelvin connect the gnd side of the set pin resistor to the load for optimum load regulation performance. a parasitic substrate diode exists between the lt3090s set and in pins. therefore, do not drive set more than 0.3 v below in during normal operation or during a fault condition. (dfn/msop) lt 3090 3090fa
11 for more information www.linear.com/lt3090 p in func t ions (dfn/msop) gnd (pin 8/9): ground. this pin supplies the lt3090's quiescent current and the drive current to the npn pass transistor. the lt3090's gnd pin is highly versatile. depending on applications requirements, it can be tied to the system ground, a positive voltage, or the out pin. a parasitic substrate diode exists between the lt3090s gnd and in pins. therefore, do not drive gnd more than 0.3v below in during normal operation or during a fault condition. out (pins 9, 10/10, 11, 12): output. these pins supply power to the load. tie all out pins together for best perfor - mance. use a minimum output capacitor of 4.7 f with an esr less than 0.5 to prevent oscillations. as mentioned in the electrical characteristics table, a minimum load cur - rent of 10 a is required to prevent instability. large load transient applications require larger output capacitors to limit peak voltage transients. see the applications informa - tion section for more information on output capacitance. a parasitic substrate diode exists between out and in pins of the lt3090. therefore, do not drive out more than 0.3 v below in during normal operation or during a fault condition. b lock diagra m ? + 50a rail-to-rail error amp 20.25a out shdn gnd imonn 0.135 5k internal current limit ?1.27v 1.23v bidirectional shutdown 3090 bd r set r load c out driver ? + ? + ? + ? + ? + ? + 3k 270 ilim in imonp positive or negative current monitor programmable current limit 2x 1x 225mv + ? v r ilim c in in set bias lt 3090 3090fa
12 for more information www.linear.com/lt3090 the lt3090 is a 600 ma, rail-to-rail output, negative low dropout linear regulator featuring very low output noise, high bandwidth, precision programmable current limit, precision positive or negative current monitor, and bi - directional shutdown . the lt3090 supplies 600 ma at a typical dropout voltage of 300 mv. unlike other devices, the lt3090 does not require a separate supply to achieve low dropout performance. the 1 ma quiescent current drops to well below 1a in shutdown. the lt3090 is easy to use and incorporates all of the pro - tection features expected in high performance regulators. included are short circuit protection, safe operating area protection, as well as thermal shutdown with hysteresis. in bipolar supply applications where the regulators load is returned to a positive supply, out can be pulled above gnd up to 36 v and still allow the lt3090 to safely startup. output voltage the lt3090 incorporates a zero tc 50 a reference cur - rent sour ce that flows into the set pin. the set pin is the inverting input of the error amp. connecting a resistor from set to ground generates a voltage that becomes the reference point for the error amplifier ( see figure 1). the reference voltage is a straight multiplication of the set pin current and the resistor value ( ohms law, v = i ? r). the rail-to-rail error amps unity gain configuration produces a low impedance voltage on its noninverting input, i.e. the out pin. output voltage is programmable from 0v (using zero resistor) to v in plus dropout. table 1 lists many common output voltages and its corresponding 1% rset resistance. table 1. 1% resistor for common output voltages v out (v) r set (k) C2.5 49.9 C3 60.4 C3.3 66.5 C5 100 C12 243 C15 301 a pplica t ions i n f or m a t ion the benefits of using a current reference, as opposed to a voltage reference as in conventional regulators such as the lt1185, lt1175, lt1964 and lt3015, is that the device always operates in unity gain configuration C regardless of the programmed output voltage. this allows the lt3090 to have loop gain, frequency response, and bandwidth independent of the output voltage. moreover, none of the error amp gain is needed to amplify the set pin voltage to a higher output voltage ( in magnitude). as a result, output load regulation is specified in terms of millivolts and not a fixed percentage of the output voltage. since the zero tc current source is very accurate, the set pin resistor is the limiting factor in achieving high accu - racy; hence , it must be a precision resistor. moreover, any leakage paths to and from the set pin create errors in the output voltage. if necessary, use high quality insulation ( e.g. teflon, kel -f ); moreover, cleaning of all insulating surfaces to remove fluxes and other residues may be required. high humidity environments may require a surface coating at the set pin to provide a moisture barrier. minimize board leakage by encircling the set pin with a guard ring operated at a potential close to itself C ideally the guard ring should be tied to the out pin. guarding both sides of the circuit board is required. bulk leakage figure 1. basic adjustable regulator lt3090 v out ?2.5v max i out 600ma set gnd ilim shdn 3090 f01 ? + 50a imonn out 0.1f c in 4.7f r set 49.9k in v in ?3v to ?10v r ilim imonp c out 4.7f 10k lt 3090 3090fa
13 for more information www.linear.com/lt3090 a pplica t ions i n f or m a t ion reduction depends on the guard ring width. leakages as small as 50 na into or out of the set pin creates a 0.1% error in the reference voltage. leakages of this magnitude, coupled with other sources of leakage, can cause significant errors in the output voltage, especially over wide operating temperature range. figure 2 illustrates a typical guard ring layout technique. if guard ring techniques are used, then set pin stray capacitance is practically eliminated. since the set pin is a high impedance node, unwanted signals may couple into the set pin and cause erratic behavior. this is most noticeable when operating with a minimum output capacitor at light load currents. the simplest remedy is to bypass the set pin with a small capacitance to ground C 100pf is generally sufficient. 30- awg wire with a diameter of 0.01 ". one foot of 30- awg wire has 465nh of self inductance. several methods exist to reduce a wires self inductance. one method divides the current flowing towards the lt3090 between two parallel conductors. in this case, placing the wires further apart reduces the inductance; up to a 50% reduction when placed only a few inches apart. splitting the wires connects two equal inductors in parallel . however, when placed in close proximity to each other, mutual inductance adds to the overall self inductance of the wires. the second and most effective technique to reduce overall inductance is to place the forward and return current conductors ( the input wire and the ground wire) in close proximity. tw o 30- awg wires separated by 0.02" reduce the overall self inductance to about one-fifth of a single wire. if a battery, mounted in close proximity, powers the lt3090, a 4.7 f input capacitor suffices for stability. however, if a distantly located supply powers the lt3090, use a larger value input capacitor. use a rough guideline of 1f ( in addition to the 4.7 f minimum) per 8 " of wire length. the minimum input capacitance needed to stabi - lize the application also varies with power supply output impedance variations. placing additional capacitance on the lt3090s output also helps. however, this requires an order of magnitude more capacitance in comparison with additional lt3090 input bypassing. series resistance between the supply and the lt3090 input also helps stabi - lize the application; as little as 0.1 to 0.5 suffices. this impedance dampens the lc tank circuit at the expense of dropout voltage. a better alternative is to use higher esr tantalum or electrolytic capacitors at the lt3090 input in place of ceramic capacitors. stability and output capacitance the lt3090 requires an output capacitor for stability. it is stable with low esr capacitors ( such as ceramic, tantalum or low esr electrolytic). a minimum output capacitor of 4.7f with an esr of 0.5 or less is recommended to prevent oscillations. larger values of output capacitance figure 2. guard ring layout for dfn stability and input capacitance the lt3090 is stable with a minimum of 4.7 f capacitor placed at the in pin. low esr ceramic capacitors can be used. however, in cases where long wires connect the power supply to the lt3090s input and ground, the use of low value input capacitors combined with a large output load current may result in instability. the resonant lc tank circuit formed by the wire inductance and the input capaci - tor is the cause and not because of lt3090 instability. the self inductance, or isolated inductance, of a wire is directly proportional to its length. however, the wire diameter has less influence on its self inductance. for example, the self inductance of a 2- awg isolated wire with a diameter of 0.26 " is about half the inductance of a 3090 f02 11 out set 10 9 6 7 8 4 5 3 2 1 lt 3090 3090fa
14 for more information www.linear.com/lt3090 a pplica t ions i n f or m a t ion decrease peak output deviations during a load transient. the lt3090 requires a minimum 10 a load current to maintain stability under all operating conditions. give extra consideration to the use of ceramic capacitors. ceramic capacitors are manufactured with a variety of di - electrics, each with different behavior across temperature and applied voltage. the most common dielectrics used are specified with eia temperature characteristic codes of z5u, y5v, x5r and x7r. the z5u and y5v dielectrics are good for providing high capacitance in small packages, but they have strong voltage and temperature coefficients as shown in figures 3 and 4. when used with a 5 v regulator, a 16v 10 f y5v capacitor can exhibit an effective value as low as 1 f to 2 f for the dc bias voltage applied over the operating temperature range. figure 3. ceramic capacitor dc bias characteristics figure 4. ceramic capacitor temperature characteristics the x5r and x7r dielectrics result in more stable character - istics, and are thus more suitable for use as the regulators output capacitor. the x7r dielectric has better stability across temperature, while x5r is less expensive and is available in higher values. nonetheless, care must still be exer cised when using x5r and x7r capacitors. the x5r and x7r codes only specify operating temperature range and the maximum capacitance change over temperature. while capacitance change due to dc bias for x5r and x7r is better than y5v and z5u dielectrics, it can still be significant enough to drop capacitance below sufficient levels. capacitor dc bias characteristics tend to improve as component case size increases, but verification of expected capacitance at the operating voltage is highly recommended. voltage and temperature coefficients are not the only sources of problems. some ceramic capacitors have a piezoelectric response. a piezoelectric device generates a voltage across its terminals due to mechanical stress upon it, similar to how a piezoelectric microphone works. for a ceramic capacitor the stress can be induced by mechanical vibrations within the system or due to thermal transients. output noise analysis the lt3090 offers many advantages with respect to noise performance. traditional linear regulators have several sources of noise. the most critical noise sources for an ldo are its voltage reference, the error amplifier, the noise of the resistors in the divider network setting output volt - age and the noise gain created by this resistor divider. many low noise regulators pin out the voltage reference to allow for bypassing and noise reduction of the refer - ence. unlike other linear regulators, the lt3090 does not use a traditional voltage reference, but instead it uses a 50a current source reference. that current operates with typical noise current levels of 31.6pa/hz (10na rms over a 10 hz to 100 khz bandwidth). the voltage noise equals the noise current multiplied by the resistor value. the resistor itself generates spot noise equal to 4ktr (whereby k = boltzmanns constant , 1.38 ? 10 C23 j/k and t is the absolute temperature) which is rms summed with the reference current noise. dc bias voltage (v) 0 change in value (%) ?20 0 20 6 10 3090 f03 ?40 ?60 2 4 8 12 14 16 ?80 ?100 both capacitors are 16v 1210 case size, 10f y5v x5r temperature (c) ?50 change in value (%) ?20 0 40 20 25 75 3090 f04 ?40 ?60 ?25 0 50 100 125 ?80 ?100 both capacitors are 16v 1210 case size, 10f y5v x5r lt 3090 3090fa
15 for more information www.linear.com/lt3090 a pplica t ions i n f or m a t ion one problem that conventional linear regulators face is that the resistor divider setting v out gains up the refer- ence noise. in contrast, the lt3090s unity gain follower ar chitecture presents no gain from the set pin to the output. therefore, output noise is virtually independent of the output voltage setting if a capacitor bypasses the set pin. resultant output noise is then set by the error amplifiers noise, typically 57nv/hz (18v rms in a 10hz to 100khz bandwidth). curves in the typical performance characteristics sec- tion show noise spectral density and peak-to-peak noise characteristics for both the reference current and the error amplifier over a 10hz to 100khz bandwidth. set pin (bypass) capacitance: output noise, psrr, transient response and soft-start bypassing the set pins voltage setting resistor with a capacitor lowers output noise. the typical performance characteristics section illustrates that connecting a 0.1 f from set to gnd yields output noise as low as 18v rms . paralleling multiple lt3090s further reduces noise by n, for n parallel regulators. curves in the typical performance characteristics section show noise spectral density and peak-to-peak noise characteristics for the error amplifier for different values of bypass capacitance. use of a set pin bypass capacitor also improves psrr and transient response performance. it is important to note that any bypass capacitor leakage deteriorates the lt3090s dc regulation. capacitor leakage of even 50na is a 0.1% dc error. therefore, lt c recommends the use of a good quality low leakage capacitor. the final benefit of using a set pin bypass capacitor is that it soft starts the output and limits inrush current. the r-c time constant, formed by the set pin resistor and capacitor, controls soft-start time. ramp-up rate from 0 to 90% of nominal v out is: t ss 2.3 ? r set ? c set for applications requiring higher accuracy or an adjustable output voltage, the set pin may be actively driven by an external voltage source capable of sourcing 50a C the application limitations are the creativity and ingenuity of the circuit designer. for instance, connecting a precision voltage reference to the set pin removes any errors in output voltage due to the reference current and resistor tolerances. shutdown/uvlo the shdn pin is used to put the lt3090 into a micro- power shutdown state. the lt3090 has an accurate C1.27v turn-on threshold on the shdn pin. this threshold can be used in conjunction with a resistor divider from the input supply to define an accurate undervoltage lockout (uvlo) threshold for the regulator. the shdn pin current ( at the threshold) needs to be considered when determining the resistor divider network. see the typical performance curves for shdn pin current vs shdn pin voltage. moreover, since the shdn pin is bidirectional, it can be taken beyond 1.4 v to turn-on the lt3090. in bipolar supply applications, the positive shdn threshold can be used to sequence the turn-on of lt3090 after the positive regulator has turned on. current monitoring (imonn and imonp) the lt3090 incorporates precision positive or negative current monitor. as illustrated in the block diagram, the negative current monitor pin ( imonn) sinks current pro - portional (1:1000) to the output current while the positive current monitor pin ( imonp) sources current proportional (1:2000) to the output current. for proper operation, ensure imonn is at least 2v above in and imonp. as highlighted in figure 5, for a negative current monitor application, tie imonp to in and tie imonn through a figure 5: negative output current monitor lt3090 gnd 1mv per ma ilim shdn 3090 f05 i out 2000 imonn out set 4.7f in v in ?3v to ?10v imonp 4.7f v out : ?2.5 max i out : 600ma 10k 0.1f 49.9k 1k lt 3090 3090fa
16 for more information www.linear.com/lt3090 a pplica t ions i n f or m a t ion the lt3090 s positive or negative current monitor circuitry is designed to remain accurate even under short circuit or dropout conditions. externally programmable current limit the ilim pin internally regulates to 225 mv above in. connecting a resistor from ilim to in sets the current flowing out of the ilim pin, which in turn programs the lt3090s current limit. the programming scale factor is 10k ? a. for example, a 20 k resistor between ilim and in programs current limit to 500 ma. for good accuracy, kelvin connect this resistor to the lt3090s in pin. in cases where the out-to-in differential is greater than 7v, the lt3090s foldback circuitry decreases the internal current limit. therefore, internal current limit may over - ride the externally programmed current limit level to keep the lt3090 within its safe-operating-area ( soa). see the internal current limit vs input-to-output differential graph in the typical performance characteristics section. ilim can be tied to in if external programmable current limit is not needed. however, because the ilim pin is internally regulated to 225 mv above in, if ilim pin is shorted to in, then this loop will current limit, thereby causing the lt3090s quiescent current to increase by about 300a. hence, when unused, it is recommended to tie ilim to in through a 10k resistor. load regulation the lt3090 does not have a separate kelvin connection for sensing output voltage. therefore, it is not possible to provide true remote load sensing. the connectivity resistance between the regulator and the load limits load regulation. the data sheet specification for load regulation is kelvin sensed at the out pin of the package. gnd side kelvin sensing is a true kelvin connection, with the top of the voltage setting resistor returned to the positive side of the load ( see figure 8). connected as shown, system load regulation is the sum of the lt3090 load regulation and the parasitic line resistance multiplied by the output current. it is therefore important to keep the negative connection between the regulator and the load as short as possible and to use wide wires or pc board traces. resistor to gnd C this generates a negative voltage (pro - portional to output current) on imonn. furthermore, as illustrated in figure 6, the negative current monitor pin can also be used for cable drop compensation. cable drop compensation corrects for load dependent voltage drop caused by a resistive connection between the lt3090s out pin and its load. figure 6. simple cable drop compensation figure 7. positive output current monitor for a positive current monitor application, as illustrated in figure 7, tie imonp through a resistor to gndthis generates a positive voltage ( proportional to output cur - rent) on imonp. and tie imonn to a supply at least 2v above the maximum operating imonp voltage. when unused, imonn and imonp pins can be left floating; however, this slightly reduces (~5%) the devices internal current limit. hence, if the current monitor functionality is not used, as shown in figure 1, it is recommended to tie imonn to gnd and imonp to in. lt3090 r cbl = r cbl1 + r cbl2 set gnd ilim shdn 3090 f06 ? + 50a imonn out 0.1f 4.7f r cdc = r cbl ? 1k 100k in v in ?6v imonp 4.7f r cbl1 r cbl2 10k load lt3090 gnd 3v ilim 2k 1mv per ma shdn 3090 f07 i out 2000 imonn out set 4.7f in v in ?3v to ?10v imonp 4.7f v out : ?2.5v max i out : 600ma 10k 0.1f 49.9k 0.1f lt 3090 3090fa
17 for more information www.linear.com/lt3090 a pplica t ions i n f or m a t ion figure 8. connections for best load regulation figure 9. floating 3-terminal adjustable regulator it is important to note that in a floating configuration and with slow v in ramp-up and ramp-down ( as shown in figures 10 and 11), the lt3090 may exhibit oscillations during start-up if shdn is tied to v in . this occurs because the shdn comparators turn-on and turn-off thresholds are referenced to the gnd pin of lt3090 . since in floating configuration the gnd pin of lt3090 is tied to the out pin, which is slowly increasing as v in is ramping up, the reference point for the shdn comparator is changing; hence, it causes start-up oscillations. this oscillation can be minimized by placing at least 0.1 f and 15 f capacitor at the set and out pins, respectivelyalthough it wont be eliminated, as per figures 10 and 11 below. for fast v in ramp-up and ramp-down the lt3090 does not oscillate. if however, the shdn pin is tied to a positive supply, 1.3v and above ( as shown in figure 12), then there are no start- up oscillations and a 4.7 f minimum output capacitor can be usedbut having some set pin capacitance is still recommended. in addition to tying the gnd pin to the out pin ( for floating configuration), the gnd pin of lt3090 can also be tied to a positive voltage as shown in the next section. figure 10. floating mode: input supply ramp-up floating 3-terminal regulator the lt3090s rail-to-rail error amp allows the ldo to be configured as a floating three-terminal regulator. with proper protection, the lt3090 can be used in arbitrarily high voltage applications. figure 9 illustrates this configura - tion. in this mode, the gnd pin current is supplied by the load; hence, a minimum 1 ma load current is required to maintain regulation. if true zero output voltage operation is required, return the 1 ma load current to a positive supply. note that in three terminal operation, the minimum input voltage is now the devices dropout voltage. furthermore, the ilim pin is internally regulated to 225 mv above in. this servo loop will current limit if ilim is shorted to in, thereby causing lt3090s quiescent current to increase by about 300 a. hence, when unused, it is recommended to tie ilim to in through a 10k resistor. figure 11. floating mode: input supply ramp-down v in : ?5v to 0v c out : 15f, c set : 0.1f v out : ?3v to 0v i l : 600ma, shdn = in 1ms/div v in 2v/div v out 1v/div 3090 f11 v in : 0v to ?5v c out : 15f, c set : 0.1f v out : 0v to ?3v i l : 600ma, shdn = in 10ms/div v in 2v/div v out 1v/div 3090 f10 lt3090 v out ?2.5v max i out 600ma parasitic resistance gnd ilim shdn 3090 f08 ? + 50a set out imonn c in 4.7f r set 49.9k in v in ?3v to ?10v imonp r p r p r p r ilim 10k load c out 4.7f lt3090 v out ?15v max i out 600ma gnd ilim shdn 3090 f09 ? + 50a set out imonn c in 4.7f r set 301k in v in ?17v to ?22v imonp r ilim 10k c out 15f 0.1f lt 3090 3090fa
18 for more information www.linear.com/lt3090 a pplica t ions i n f or m a t ion gnd pin versatility of lt3090 for applications requiring very low output voltages such as below C1 v, the minimum input voltage of C1.9 v limits how low v in can drop before the device stops regulating. as shown in figure 13, this results in a much higher dropout voltage set by the minimum v in specification rather than the actual dropout of the npn pass device. set below the lt3090s C1.9 v minimum input voltage. as long as there is 1.9 v between in and gnd pins of lt3090, the minimum operating voltage is satisfied. now it can operate with much lower dropout voltage, with the device dropout set by the pass device as illustrated in figure 14. figure 12. floating mode: input supply ramp-up and down using positive shdn v in : ?5v to 0v c out : 15f, c set : 0.1f v out : ?3v to 0v i l : 600ma, v shdn = 1.5v 50ms/div v in 2v/div v out 1v/div 3090 f12 figure 13. generating very low output voltages figure 14. low dropout operation for very low output voltages note that if the lt3090s shdn capability is not desired, then tie the shdn pin to v in . however, if it is desired to turn the device on and off, then the shdn logic signal needs to be referenced to the lt3090s gnd pin. a simple way to achieve this is shown figure 15, but the gnd pin needs to be at least +1.4v. figure 15. gnd pin referenced shdn signal a solution to this problem is available from the lt3090 architecture and the flexibility in how its gnd pin can be connected. the gnd pin does not need to be connected to system ground! it can be connected to a positive volt- age as well. if the gnd pin of lt3090 is tied to a positive voltage that is at least 1.9 v above v in , then v in can be lt3090 gnd ilim shdn ? + 50a set out imonn c in 4.7f r set 4.02k in v in ?1.9v to ?7v imonp 10k c out 4.7f v out ?0.2v max i out 600ma r ilim 0.1f 3090 f13 lt3090 gnd ilim shdn ? + 50a set out imonn c in 4.7f r set 4.02k in v in ?0.7v to ?7v imonp 10k c out 4.7f +1.2v or higher v out ?0.2v max i out 600ma r ilim c gnd 0.47f 0.1f 3090 f14 lt3090 gnd ilim shdn shdn (active low) ? + 50a set out imonn c in 4.7f r set 4.02k in v in ?0.7v to ?7v imonp 10k c out 4.7f +1.4v or higher v out ?0.2v max i out 600ma r ilim c gnd 0.47f 0.1f 3090 f15 100k lt 3090 3090fa
19 for more information www.linear.com/lt3090 a pplica t ions i n f or m a t ion in summary, the gnd pin of lt3090 is highly versatile and can be tied to different places depending on the ap- plications requirements: a) it can be tied to the system gnd for low dropout operation for output voltages greater than C1.6 v, b) it can be tied to a positive voltage for low dropout operation for very low output voltages, and c) as illustrated in the floating 3- terminal regulator section, the gnd pin can be tied to the out pin for very high common mode voltage applications. direct paralleling higher output current is obtained by paralleling multiple lt3090s. tie all set pins together and all in pins together. connect the out pins together using small pieces of pc trace ( used as a ballast resistor) to equalize the currents in each lt3090. pc trace resistance in m/inch is shown in table 2. ballasting requires only a tiny area. table 2. pc board trace resistance weight (oz) 10mil width* 20mil width* 1 54.3 27.1 2 27.1 13.6 *trace resistance is measured in m/in the small worst-case offset of 2 mv for each paralleled lt3090 minimizes the value of required ballast resistance. figure 16 illustrates that two lt3090s, each using a 20m pcb trace ballast resistor, provide better than 80% output current sharing at full load. the 20m external resistances (10m for the two devices in parallel) only adds 12 mv of output regulation drop with a 1.2 a maximum load. with an output voltage as low as C1.2 v, this only adds 1% to the regulation accuracy. if this additional load regulation error is intolerable, circuits shown in the typical applica - tions section highlight how to correct this error using the output current monitor function or the master-slave configuration. finally, note that more than two lt3090s can be paralleled for higher output current. paralleling multiple lt3090s is a useful technique for distributing heat on the pcb. for applications with high input-to-output voltage differential, either input series resistors or resistors in parallel with the lt3090s further spread heat. thermal considerations the lt3090 has internal power and thermal limiting cir - cuitry designed to protect it under overload conditions. the typical thermal shutdown temperature is 165 c with about 8c of hysteresis. for continuous normal load conditions, do not exceed the maximum junction temperature. it is important to consider all sources of thermal resistance from junction to ambient. this includes junction-to-case, case-to-heat sink interface, heat sink resistance or circuit board-to-ambient as the application dictates. additionally, consider all heat sources in close proximity to the lt3090. the undersides of the dfn and msop packages have exposed metal from the lead frame to the die attachment. both packages allow heat to directly transfer from the die junction to the pcb metal to limit the maximum operating figure 16. parallel devices lt3090 v out ?2.5v max i out 1.2a gnd ilim shdn ? + 50a set out imonn 10f 24.9k in v in ?3v to ?10v imonp 10k 10f 20m 0.1f 3090 f16 lt3090 gnd ilim shdn ? + 50a set out imonn in imonp 10k 20m lt 3090 3090fa
20 for more information www.linear.com/lt3090 a pplica t ions i n f or m a t ion junction temperature. the dual-in-line pin arrangement allows metal to extend beyond the ends of the package on the topside ( component side) of the pcb. connect this metal to in on the pcb. the multiple in and out pins of the lt3090 further assist in spreading heat to the pcb. for surface mount devices, heat sinking is accomplished by using the heat spreading capabilities of the pcb and its copper traces. copper board stiffeners and plated through- holes can also be used to spread the heat generated by power devices. table 3. measured thermal resistance for dfn package copper area board area thermal resistance top side* bottom side 2500mm 2 2500mm 2 2500mm 2 34c/w 1000mm 2 2500mm 2 2500mm 2 34c/w 225mm 2 2500mm 2 2500mm 2 35c/w 100mm 2 2500mm 2 2500mm 2 36c/w *device is mounted on topside table 4. measured thermal resistance for msop package copper area board area thermal resistance top side* bottom side 2500mm 2 2500mm 2 2500mm 2 33c/w 1000mm 2 2500mm 2 2500mm 2 33c/w 225mm 2 2500mm 2 2500mm 2 34c/w 100mm 2 2500mm 2 2500mm 2 35c/w *device is mounted on topside tables 3 and 4 list thermal resistance as a function of copper area in a fixed board size. all measurements were taken in still air on a 4 layer fr-4 board with 1 oz solid internal planes and 2 oz top/bottom external trace planes with a total board thickness of 1.6 mm. the four layers were electrically isolated with no thermal vias present. pcb layers, copper weight, board layout and thermal vias affect the resultant thermal resistance. for more information on thermal resistance and high thermal conductivity test boards, refer to jedec standard jesd51, notably jesd51-7 and jesd51-12. achieving low thermal resistance neces - sitates attentions to detail and careful pcb layout. calculating junction t emperature example: given an output voltage of C2.5 v and input voltage of C3.3v 5%, output current range from 1ma to 500 ma, and a maximum ambient temperature of 85c, what is the maximum junction temperature? the lt3090s power dissipation is: i out(max) ? (v in(max) C v out ) + i gnd ? v in(max) where: i out(max) = C500ma v in(max) = C3.465v i gnd ( at i out = C500 ma and v in = C3.465v) = C6.5ma thus: p = (C0.5 a ) ? (C3.465v + 2.5v) + (C6.5ma ) ? (C 3.465v) = 0.505w using a dfn package, the thermal resistance is in the range of 34 c/w to 36 c/w depending on the copper area. therefore, the junction temperature rise above ambient approximately equals: 0.505 w ? 35c/w = 18c the maximum junction temperature equals the maxi- mum ambient temperature plus the maximum junction temperature rise above ambient: t jmax = 85c + 18c = 103c overload recovery like many monolithic power regulators, the lt3090 incorporates safe-operating-area ( soa) protection. the soa protection activates at output-to-input differential voltage greater than 7 v. the soa protection decreases current limit as output-to-input differential increases and keeps the power transistor inside a safe operating region for all values of output-to-input voltage up to the lt3090s absolute maximum ratings. the lt3090 provides some level of output current for all values of output-to-input differential. refer to the current limit curve in the typical performance characteristics section. when power is first lt 3090 3090fa
21 for more information www.linear.com/lt3090 a pplica t ions i n f or m a t ion applied and input voltage rises, the output follows the input and keeps the output-to-input differential low to allow the regulator to supply large output current and startup into high current loads. due to current limit fold back, however, at high input volt - ages, a problem can occur if the output voltage is low and the load current is high. such situations occur after the removal of a short-circuit or if the shutdown pin is pulled high after the input voltage has already turn on. the load line for such a load intersects the output current curve at two points. if this happens, the regulator has two stable output operating points. with this double intersection, the input power supply may need to be cycled down to zero and brought back up again to make the output recover. other lt c negative linear regulators such as the lt3015, lt1964, and lt1175 also exhibit this phenomenon, so it is not unique to the lt3090. protection features the lt3090 incorporates several protection features that make it ideal for use in battery-powered applications. in addition to the normal protection features associated with monolithic regulators, such as current limiting and thermal limiting, the device also protects itself against reverse output voltages. precision current limit and thermal overload protection protect the lt3090 against overload and fault conditions at the devices output. for normal operation, do not al - low the junction temperature to exceed 125 c for e- and i-grades and 150c for h- and mp-grades. pulling the lt3090s output above ground induces no damage to the part. if in is left open circuited or grounded, out can be pulled 36 v above gnd. in this condition, a maximum current of 7 ma flows into the out pin and out of the gnd pin. if in is powered by a voltage source, out sinks the lt3090s ( fold back) short-circuit current and protects itself by thermal limiting. in this case, however, grounding the shdn pin turns off the device and stops out from sinking the short-circuit current. lt 3090 3090fa
22 for more information www.linear.com/lt3090 parallel devices typical a pplica t ions lt3090 v out ?2.5v max i out 1.2a gnd ilim shdn ? + 50a set out imonn 10f 24.9k 1% in v in ?3v to ?10v imonp 10k 10f 20m 0.1f 3090 ta02 lt3090 gnd ilim shdn ? + 50a set out imonn in imonp 10k 20m lt 3090 3090fa
23 for more information www.linear.com/lt3090 typical a pplica t ions paralleling devices using imonn to cancel ballast resistor drop load sharing without ballasting (using imonp) master regulator slave regulator lt3090 v out ?2.5v max i out 1.2a gnd ilim shdn ? + 50a set out imonn 10f 24.9k 1% in v in ?3v to ?10v imonp 10k 20m c set 0.1f 3090 ta03 lt3090 gnd ilim shdn ? + 50a set out imonn in imonp 10k r comp 10 r comp = 1k ? rblst/n v out = n ? 50a(r set + r comp ) 20m 10f lt3090 gnd ilim shdn set out imonn 10f 24.9k 1% in v in ?3v to ?10v imonp 10k 3090 ta04 0.1f lt3090 gnd ilim shdn set imonn v out : ?2.5v max i out : 1.2a in imonp 10k 300 300 2n3904 2n3904 0.1f 10f 24.9k 1% ? + 50a ? + 50a out lt 3090 3090fa
24 for more information www.linear.com/lt3090 paralleling devices without ballasting (50ma minimum load) using lower value rset for higher output voltages typical a pplica t ions lt3090 gnd ilim shdn ? + 50a set out imonn 10f 24.9k 1% master regulator slave regulator in v in ?3v to ?10v imonp 10k 20 0.1f 10f 3090 ta05 lt3090 gnd set ilim shdn ? + 50a out imonn in imonp 10k v out ?2.5v i out 1.2a 20m lt3090 gnd ilim shdn ? + 50a set out imonn c in 4.7f 10k 1% r set in v in imonp 10k 0.1f c out 4.7f 3090 ta06 v out = C0.5v C 1ma ? r set max i out : 600ma 523 1% lt 3090 3090fa
25 for more information www.linear.com/lt3090 constant-current constant-voltage lab power supply low dropout operation for very low output voltages typical a pplica t ions lt3090 gnd ilim shdn 3090 ta07 ? + 50a set 0.1f out imonn 4.7f r set v out in v in imonp r ilim 4.7f lt3090 gnd ilim shdn ? + 50a set out imonn c in 4.7f 4.02k 1% in v in ?0.7v to ?7v imonp 10k 0.1f c out 4.7f 3090 ta08 v out : ?0.2v max i out : 600ma +1.2v or higher c gnd 0.47f lt 3090 3090fa
26 for more information www.linear.com/lt3090 input supply tracking floating 3-terminal regulator (for arbitrarily high voltage applications) typical a pplica t ions lt3090 gnd ilim shdn 3090 ta09 ? + 50a set 0.1f out imonn 4.7f 100k 1% v out = v in ? 5v max i out 600ma v in in imonp 10k 4.7f lt3090 gnd ilim 36v 36v shdn 3090 ta10 ? + 50a set 0.1f out imonn 4.7f v in ?52v to ?57v 1m 1% v out ?50v max i out 600ma in imonp 10k 4.7f lt 3090 3090fa
27 for more information www.linear.com/lt3090 500ma led driver with grounded led tab (heatsink) 500ma led driver with positive supply low noise single inductor positive-to-negative converter typical a pplica t ions lt3090 gnd ilim shdn 3090 ta11 ? + 50a set out imonn 4.7f v in 400m 4.7f in imonp 10k 4.02k 500ma v in gnd ilim shdn 3090 ta12 ? + 50a lt3090 set out imonn 4.7f 400m 4.7f in imonp 10k 4.02k 500ma lt3090 gnd ilim shdn 3090 ta13 ? + 50a set 0.1f out imonn 4.7f 49.9k 1% v out2 ?2.5v max i out 600ma in imonp 10k 4.7f bd boost sw fb lt3480 v in rt pg sync run/ss gnd v c 18.2k ?5v d: diodes inc. dfls240l l: nec/tokin plc-0755-100 v in 12v 330pf 0.47f d l 10h 68.1k 47f 100k 47f 536k lt 3090 3090fa
28 for more information www.linear.com/lt3090 high efficiency low noise single inductor positive-to-negative converter with ldo input-to-output control typical a pplica t ions lt3090 gnd ilim shdn 3090 ta14 ? + 50a set 0.1f out imonn 4.7f 49.9k 1% v out ?2.5v max i out 600ma in imonp 10k 4.7f bd boost sw fb lt3480 v in rt 47f pg sync run/ss gnd v c v in ?5v l: coilcraft xal5050 d: diodes inc. dfls230l m: vn2222 qp: 2n3906 z: 1n5339b (5.6v) v in 12v 2.2nf 1f qp qp m z d l 10h (500khz) 68.1k 1% ldo out ? 2v max: ?5v min: ?0.8v 1k 5.36k 47f 1nf lt 3090 3090fa
29 for more information www.linear.com/lt3090 5v to 2.5v low noise power supply typical a pplica t ions 3090 ta15 bd boost sw fb lt3480 v in rt pg sync run/ss gnd v c 18.2k v in 5v 330pf 0.47f 47f d l 10h 68.1k 1% f osc = 500khz d: diodes inc, dfls240l l: nec/tokin plc-0755-100 539k 47f lt3085 ctrl ? + set 0.1f 249k 1% out in 4.7f v out2 2.5v max i out 500ma lt3090 gnd ilim shdn ? + 50a 10a set 0.1f out imonn 4.7f 49.9k 1% v out2 ?2.5v max i out 600ma in imonp 10k 4.7f v in ?5v 100k lt 3090 3090fa
30 for more information www.linear.com/lt3090 reference buffer coincident tracking supplies typical a pplica t ions 3090 ta17 lt3090 gnd ilim shdn ? + 50a set r1 49.9k 1% out imonn c in 4.7f v out1 , ?2.5v 600ma v out2 , ?3.3v 600ma v out3 , ?5v 600ma in imonp 10k c out 4.7f v in ?5.5v to ?10v lt3090 gnd ilim shdn ? + 50a set out imonn in imonp 10k c out 4.7f lt3090 gnd ilim shdn ? + 50a set out imonn in imonp 10k c out 4.7f r3 34k 1% r2 16.2k 1% 3090 ta16 lt3090 gnd ilim shdn ? + 50a set lt1004-2.5 out imonn c in 4.7f v out ?2.5v max i out 600ma in imonp 10k c out 4.7f v in ?3v to ?10v lt 3090 3090fa
31 for more information www.linear.com/lt3090 low noise 4-quadrant power supply simple cable drop compensation typical a pplica t ions 3090 ta18 lt3090 gnd ilim shdn ? + 50a set 0.1f out imonn 4.7f 100k 1% v out ?5v max i out 600ma in imonp 10k r cdc = r cbl ? 1k v in ?6v r cbl = r cbl1 + r cbl2 4.7f r cbl1 r cbl2 load 3090 ta19 4.7f lt3085 ctrl v cc ? + set out in 10f lt3090 gnd ilim shdn ? + 50a set out imonn 4.7f v out (source/sink 500ma) v ee + v dropout (lt3090) v out v cc ? v dropout (lt3085) v set in imonp 10k 40m 40m v ee 10a lt 3090 3090fa
32 for more information www.linear.com/lt3090 tw o -terminal current source positive output current monitor negative output current monitor typical a pplica t ions v in gnd ilim shdn 3090 ta20 ? + 50a lt3090 set out imonn i out = 200mv/r1 in imonp 10k 10f 4.02k, 1% r1 gnd ilim shdn 3090 ta21 ? + 50a lt3090 set out imonp v out ?2.5v max i out 600ma in imonn 10k 4.7f 49.9k 1% 4.7f 0.1f 3v 0.1f 3.32k to adc v in ?3v to ?10v gnd imonp ilim shdn 3090 ta22 ? + 50a lt3090 set out imonn v out ?2.5v max i out 600ma in 4.7f 10k 49.9k 1% 4.7f 0.1f to adc 1.67k v in ?3v to ?10v lt 3090 3090fa
33 for more information www.linear.com/lt3090 p ackage descrip t ion please refer to http://www .linear.com/designtools/packaging/ for the most recent package drawings. 3.00 0.10 (4 sides) note: 1. drawing to be made a jedec package outline m0-229 variation of (weed-2). check the ltc website data sheet for current status of variation assignment 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom view?exposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.125 typ 2.38 0.10 (2 sides) 1 5 10 6 pin 1 top mark (see note 6) 0.200 ref 0.00 ? 0.05 (dd) dfn rev c 0310 0.25 0.05 2.38 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.15 0.05 0.50 bsc 0.70 0.05 3.55 0.05 package outline 0.25 0.05 0.50 bsc dd package 10-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1699 rev c) pin 1 notch r = 0.20 or 0.35 45 chamfer lt 3090 3090fa
34 for more information www.linear.com/lt3090 p ackage descrip t ion please refer to http://www .linear.com/designtools/packaging/ for the most recent package drawings. msop (mse12) 0213 rev g 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.22 ?0.38 (.009 ? .015) typ 0.86 (.034) ref 0.650 (.0256) bsc 12 12 11 10 9 8 7 7 detail ?b? 1 6 note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 6. exposed pad dimension does include mold flash. mold flash on e-pad shall not exceed 0.254mm (.010") per side. 0.254 (.010) 0 ? 6 typ detail ?a? detail ?a? gauge plane recommended solder pad layout bottom view of exposed pad option 2.845 0.102 (.112 .004) 2.845 0.102 (.112 .004) 4.039 0.102 (.159 .004) (note 3) 1.651 0.102 (.065 .004) 1.651 0.102 (.065 .004) 0.1016 0.0508 (.004 .002) 1 2 3 4 5 6 3.00 0.102 (.118 .004) (note 4) 0.406 0.076 (.016 .003) ref 4.90 0.152 (.193 .006) detail ?b? corner tail is part of the leadframe feature. for reference only no measurement purpose 0.12 ref 0.35 ref 5.10 (.201) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) 0.42 0.038 (.0165 .0015) typ 0.65 (.0256) bsc mse package 12-lead plastic msop, exposed die pad (reference ltc dwg # 05-08-1666 rev g) lt 3090 3090fa
35 for more information www.linear.com/lt3090 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. r evision h is t ory rev date description page number a 01/14 modified ripple rejection test condition added units to internal current limit spec modified iset thermal regulation test condition modified load sharing without ballasting application circuit modified coincident tracking supplies application circuit modified parallel devices application circuit 3 3 4 23 30 36 lt 3090 3090fa
36 for more information www.linear.com/lt3090 ? linear technology corporation 2013 lt 0114 rev a ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/lt3090 r ela t e d p ar t s typical a pplica t ion part number description comments lt1185 3a, negative linear regulator 750mv dropout voltage, v in = C6v to C16v, dd- pak and to-220 packages lt1175 500ma, negative low dropout micropower regulator 500mv dropout voltage, v in = C4.5v to C20v, n8, s8, dd- pak , to-220 and sot-223 lt1964 200ma, negative low noise low dropout regulator 340mv dropout voltage, low noise: 30v rms , v in = C1.9v to C20v, dfn and sot-23 packages lt3015 1.5a, fast transient response, negative ldo regulator 310mv dropout voltage, low noise: 60v rms , v in = C2.3v to C30v, dfn, msop, to-220 and sot-223 packages lt 3080 1.1a, parallelable, low noise, low dropout linear regulator 300mv dropout v oltage (2-supply operation), low noise: 40v rms , v in : 1.2v to 36v, single resistor output, dfn, msop, to-220 and dd packages lt3085 500ma, parallelable, low noise, low dropout linear regulator 275mv dropout voltage (2-supply operation), low noise: 40v rms , v in : 1.2v to 36v, single resistor output, dfn, msop, to-220 and dd packages lt3082 200ma, parallelable, low noise, low dropout linear regulator low noise: 33v rms , v in : 1.2v to 36v, single resistor output, dfn, sot-223 and sot-23 packages lt3081 1.5a, parallelable, low noise, low dropout linear regulator low noise: 33v rms , v in : 1.2v to 36v, single resistor output, dfn, fe, dd- pak and to-220 packages lt 3083 3a, parallelable, low noise, low dropout linear regulator 310mv dropout v oltage (2-supply operation), low noise: 40v rms , v in : 1.2v to 36v, single resistor output, dfn, msop, to-220 and dd packages parallel devices v in ?3v to ?10v gnd ilim shdn ? + 50a lt3090 set out imonn v out ?2.5v max i out 1.2a in imonp 10k 10f ilim shdn imonp 10k 24.9k 1% 10f 0.1f 20m 20m gnd 3090 ta23 ? + 50a lt3090 set out imonn in lt 3090 3090fa

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